Bridged capacitor sensor measurement circuit

Details Bridged capacitor sensor measurement circuit Bridged capacitor sensor measurement circuit

2002-02-15

2004-04-13

Le, N. (Department: 2858)

Electricity: measuring and testing

Impedance, admittance or other quantities representative of...

Lumped type parameters

C324S658000, C324S686000

Reexamination Certificate

active

06720777

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to industrial process control transmitters, and particularly to apparatus that increases the stability of a differential sensor or sensor pair for such a transmitter.
BACKGROUND OF THE INVENTION
Industrial process control transmitters are used to measure process variables of fluids in an industrial process. Typically, these transmitters are placed in field locations and provide standardized transmission signals representing process variable of the monitored fluid, such as pressure. The fluids include slurries, liquids, vapors and gasses, in industrial process plants, such as chemical, pulp, petroleum, gas, pharmaceutical, food and other fluid processing plants. The monitored process variables can be pressure, temperature, flow, level, pH, conductivity, turbidity, density, concentration, chemical composition or other properties of fluids.
An industrial process control transmitter typically includes a sensor that senses the process variable, a measurement circuit that provides a measurement of the value of sensed process variable and a communication circuit that transmits the measurement information to another location. One example of a sensor employed in industrial process control transmitters is a capacitance sensor that measures pressure in the industrial process. One such sensor includes a pressure-responsive structure supporting a pair of capacitor plates that together define a capacitor sensor. Pressure applied to the structure deflects the relative positions of the plates to alter the capacitance between the plate as a measure of pressure. Conveniently, the capacitor plates are mounted in a cavity in the pressure-responsive structure so that pressure applied to one side of the structure deforms the cavity to deflect one of the plates. Also conveniently, the pressure-responsive structure is formed of sapphire or other corrosion-resistant, pressure-responsive material. One such sensor is described in U.S. Pat. No. 5,637,802 granted Jun. 10, 1997 to Frick et al. and assigned to the same assignee as the present invention.
The capacitor plates supported by the pressure-responsive material form an absolute pressure sensor. Nevertheless, as described in the Frick et al. patent, differential pressure, that is a difference between two pressures in the industrial process, is sensed by identifying a difference between the capacitances of two such sensors. The measurement circuit charges the capacitor plates and provides a measurement of differential pressure.
The measurement circuit may include a delta sigma converter (also called a sigma delta, &Dgr;&Sgr;, or &Sgr;&Dgr; converter) that acts as a capacitance-to-digital converter. The delta sigma circuit may include one or two stages of integration; the circuit employing two stages of integration displays significantly reduced quantization noise in the measurement.
In the case of a differential capacitance ratio measurement, the measurement circuit provides a measurement output representative of the ratio of (C
1
-C
2
) to some reference capacitance C
REF
, (C
1
-C
2
)/C
REF
. Unfortunately, such a converter system may become unstable. More particularly, the difference between the two capacitances may be either positive or negative, depending upon whether C
2
is larger or smaller than C
1
. When the increment proportional to (C
1
-C
2
) has the same polarity as the increment proportional to the reference capacitor C
REF
, the system becomes a non-convergent integration system and is unstable. This can occur when C
2
is greater than C
1
and is true for both first-order and second-order capacitive-to-digital converters. Moreover, for a second-order capacitive-to-digital converter, there is a limitation on the ratio of C
REF
/|C
1
-C
2
|. Since the value of |C
1
-C
2
| may be arbitrarily small, the ratio of C
REF
/|C
1
-C
2
| can be arbitrarily large. If that ratio becomes too large, the output signal of the second stage of the delta sigma converter may saturate.
SUMMARY OF THE INVENTION
The present invention employs a reference capacitor that is larger than the expected maximum difference |C
1
-C
2
|
max
between the two capacitors of the differential pair. Consequently, the sign of the difference C
1
-C
2
will not cause non-convergence of the integration process. Moreover, the value of the capacitance of C
REF
can be established such that the output signals of the converter will not saturate.
In accordance with the present invention, first sides of a pair of capacitor sensors are coupled at a bridge node and to the process variable to provide a differential capacitance representative of the process variable. A switch circuit selectively couples the capacitors to a first or second voltage to derive a representation of C
1
-C
2
at the bridge node.
In preferred embodiments, the switch circuit includes a first switch selectively coupling the second side of the first capacitor to first and second voltage levels and a second switch selectively coupling the second side of the second capacitor to the first and second voltage levels. A switch control operates the first and second switches during a first phase to couple the first capacitor to the first voltage level and the second capacitor to the second voltage level and during a second phase to couple the second capacitor to the first voltage level and the first capacitor to the second voltage level.
In preferred embodiments, a summing node is coupled to the bridge node and a reference capacitor C
REF
is coupled to the summing node.
In one embodiment, the sensor capacitors and reference capacitor are operated during mutually exclusive first and second cycles to supply charges representative of C
1
-C
2
and C
REF
to the summing node so that
N
A
N
B
=
C
1
-
C
2
C
REF
where N
A
and N
B
are the number of first and second cycles.
In another embodiment, the reference capacitor is operated oppositely during respective phases of first and second cycles and the sensors are operated oppositely during respective phases of all cycles to supply charges representative of (C
1
-C
2
)−C
REF
and (C
1
-C
2
)+C
REF
to the summing node so that
N
A
-
N
B
N
A
+
N
B
=
C
1
-
C
2
C
REF
where N
A
and N
B
are the number of first and second cycles.


REFERENCES:
patent: 5083091 (1992-01-01), Frick et al.
patent: 5194819 (1993-03-01), Briefer
patent: 5637802 (1997-06-01), Frick et al.
patent: 5661240 (1997-08-01), Kemp
patent: 6140952 (2000-10-01), Gaboury
patent: 1 072 865 (2001-01-01), None
patent: WO 00/70321 (2000-11-01), None
E. Schrüfer, “Elektrische Me&bgr;technik”, mit 410 Bildern und 36 Tabellen, pp. 384-386, 1995.

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