Bridge between two buses of a computer system with a direct memo

Details Bridge between two buses of a computer system with a direct memo Bridge between two buses of a computer system with a direct memo

1994-11-30

1997-04-22

Shin, Christopher B.

395308, 395309, 395823, G06F 1328

Patent

active

056236972

ABSTRACT:
A system having an industry standard architecture (ISA) bus with a 24-bit memory addressing capacity and a peripheral controller interconnect (PCI) bus with a 32-bit memory addressing capacity, is provided with a bridge coupled between the ISA and PCI buses. The bridge has a direct memory access (DMA) controller circuit that generates 32-bit memory addresses for DMA transfer operations over the PCI bus. The DMA controller circuit includes a pair of cascaded DMA controllers that generate the 16 least significant bits of the 32-bit memory addresses, and address extension logic having a low page register that provides the 8 next most significant bits of the 32-bit memory addresses, and a high page register that provides the 8 most significant bits of the 32-bit memory addresses. The 16 bits provided by the low and high page registers are concatenated with the lower 16 bits to form the 32-bit addresses. The DMA controller circuit is also provided with count extension logic that increases the transfer count from a 16-bit number to a 24-bit number, so that larger segments of memory may be moved in the individual DMA transfers.

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