1992-08-27
1995-06-06
Harvey, Jack B.
395250, 395425, G06F 1300
Patent
active
054230489
ABSTRACT:
A method and circuit for prefetching is provided wherein selective caching of instructions occurs. An instruction execution tree comprising a plurality of instructions is traversed in a predetermined manner. Instructions depending from both paths of a conditional branch instruction are prefetched. When it is determined that a branch of prefetched instructions is not in the path of execution the instructions associated with that branch are deleted thereby pruning the branch. Instruction addresses are therefore selectively removed from a storage memory in such a manner as to provide the cache with instructions which will likely be required by the processor.
REFERENCES:
patent: 4742451 (1988-05-01), Bruckert
patent: 4881170 (1989-11-01), Morisada
patent: 4894772 (1990-01-01), Langendorf
patent: 4943908 (1990-07-01), Emma
patent: 4974154 (1990-11-01), Matsuo
patent: 5127091 (1992-06-01), Boufarah
patent: 5226138 (1993-07-01), Shermis
"RISC Enters a New Generation", BYTE Magazine, Aug. 1992, pp. 141-148.
Harvey Jack B.
Northern Telecom Limited
Travis John
Turpin F. P.
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