Branch target and next instruction address calculation in a pipe

Boots – shoes – and leggings

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395375, 3642318, 3642613, 3642617, 364DIG1, G06F 932, G06F 938

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055220533

ABSTRACT:
An instruction decoding device for a data processor which is capable of predicting a branch address is disclosed. A program counter value calculation device can be used to calculate the branch target address. An address calculation device can be used to calculate an operand address. The address calculation device can calculate the operand address by adding the instruction length of the branch instruction and the program counter value of the branch instruction. In this way the apparatus performs branching processing for the unconditional branch instructions, conditional branch instructions, subroutine branch instructions and loop control instructions at the instruction decoding stage to suppress disturbances in the pipeline processing.

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