Branch target address cache with hashed indices

Details Branch target address cache with hashed indices Branch target address cache with hashed indices

2011-06-14

2011-06-14

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction fetching

C712S239000

Reexamination Certificate

active

07962722

ABSTRACT:
In at least one embodiment, a processor includes at least one execution unit that executes instructions and instruction sequencing logic, coupled to the at least one execution unit, that fetches instructions from a memory system for execution by the at least one execution unit. The instruction sequencing logic including a branch target address cache (BTAC) including a plurality of entries for storing branch target address predictions. The BTAC includes index logic that selects an entry to access utilizing a BTAC index based upon at least a set of higher order bits of an instruction address and a set of lower order bits of the instruction address.

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