Branch prediction and resolution apparatus for a superscalar com

Details Branch prediction and resolution apparatus for a superscalar com Branch prediction and resolution apparatus for a superscalar com

1995-02-09

1997-02-25

Treat, William M.

395800, 395386, G06F 938

Patent

active

056066767

ABSTRACT:
An apparatus and method for improving the performance of superscalar pipelined computers using branch prediction and verification that the predicted branch is correct. A predicted branch may be resolved in one of two distinct pipeline stages, and a method is provided for handling branches that are resolved in either of the pipeline stages. A branch verification method is provided that verifies that the architecturally correct instructions are in the decode and execution stages. Furthermore, two sets of prefetch buffers are provided to allow branch prediction when multiple clock decoding is required by a multi-clock instruction.

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