BPSK demodulator with D type flip/flop

Pulse or digital communications – Repeaters – Testing

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Details

329105, 329124, H04L 2722

Patent

active

047440945

ABSTRACT:
A BPSK demodulator includes a D type flip-flop having a clock terminal supplied with the output of a phase locked loop (PLL). The ouput of the D flip-flop and the carrier are provided as inputs to an exclusive OR gate, the output of which is used to lock up the PLL. The VCO in the PLL is phase displaced 90.degree. with respect to the carrier such that the carrier is sampled to detect the data.

REFERENCES:
patent: 3312901 (1967-04-01), Becker et al.
patent: 3908115 (1975-09-01), Waggener
patent: 4222009 (1980-09-01), Moulton et al.
patent: 4380815 (1983-04-01), Clendening
patent: 4575684 (1986-03-01), Stamm

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