Box-in-box field-to-field alignment structure

Details Box-in-box field-to-field alignment structure Box-in-box field-to-field alignment structure

2002-04-01

2004-11-09

Wilson, Allan R. (Department: 2815)

Radiation imagery chemistry: process, composition, or product th

Registration or layout process other than color proofing

C257S797000, C257S048000, C430S005000, C430S022000, C430S616000, C438S481000, C438S462000, C438S975000

Reexamination Certificate

active

06815128

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to test structure patterns used in semiconductor manufacturing, and in particular to optical alignment test structure patterns on photomasks used to determine field-to-field alignment of a stepper in a lithographic process.
DESCRIPTION OF RELATED ART
Photomasks are an integral component in the lithographic process of semiconductor manufacturing. Semiconductor manufacturers use photomasks to optically transfer (e.g., print) images of devices (e.g., integrated circuits) onto semiconductor wafers. A lithography tool called stepper projects light through the photomask to print the image of one or more devices onto a field on a silicon wafer coated with photoresist. The stepper then moves (e.g., steps) the wafer and the image is exposed once again onto another field on the wafer. This process is repeated for the entire wafer surface. When using a positive photoresist, the exposed portions of the photoresist are removed so areas of the wafer underneath can either be etched to form channels or be deposited with other materials. This process can be reversed using a negative photoresist where the unexposed portions of the photoresist are removed.
FIG. 1
illustrates a path
102
of a stepper on a wafer
100
coated with photoresist. The stepper prints the image of one or more devices on fields
200
-
1
,
200
-
2
. . .
200
-
i
. . .
200
-
n
on wafer
100
, where “i” and “n” are variables.
FIG. 2
illustrates that each field partially overlaps neighboring fields in scribe lanes (also known as “scribe lines” or “scribe streets”) where a dicing tool cuts to separate the fields. For example, the left edge of field
200
-
1
and the right edge of field
200
-
2
overlap in scribe lanes
202
and
210
, the lower edge of field
200
-
1
and the upper edge of field
200
-
7
overlap in scribe lanes
208
and
210
, and the lower left corner of field
200
-
1
and the upper right corner of field
200
-
6
overlap in scribe lane
210
. Similarly, the upper edge of field
200
-
6
and the lower edge of field
200
-
2
overlap in scribe lanes
204
and
210
, and the right edge of field
200
-
6
and the left edge of field
200
-
7
overlap in scribe lanes
206
and
210
.
In lithography, field-to-field alignment of the stepper is critical because it impacts all future masking alignments, wafer sort, and ultimately the assembly process. If the field alignment is poor, it directly impacts sort yield and assembly yield. The assembly process can be halted if the field-to-field alignment is so poor that the dicing tool cuts into the production die and damages the die and itself.
Thus, what is needed is a production friendly, field-to-field alignment tool that allows quick verification that the stepper has accurately placed and aligned each field relative to the neighboring fields.
SUMMARY OF THE INVENTION
In one embodiment of the invention, a field pattern includes a die region, a first scribe along an edge of the die region, and a second scribe along an opposing edge of the die region. The first scribe includes at least a first translucent box and a second translucent box. The second scribe includes at least a first opaque box and a second opaque box defined respectively by a first translucent frame and a second translucent frame.
When the field pattern is stepped between neighboring fields on a wafer, the first scribe and the second scribe overlap on a scribe lane between the fields. When the first scribe and the second scribe overlap on the scribe lane, the first translucent box is placed at least partially (ideally completely) within the first opaque box, and the second translucent box is placed at least partially within the second opaque box.
If a translucent box is placed completely inside an opaque box, only the area inside that opaque box is exposed and thus a continuous ring is formed when the resist is developed. The continuous ring indicates that the neighboring fields are aligned at least within an amount equal to the difference between the dimensions of that translucent box and that opaque box. Such a continuous ring is easily observable on the resist on top of the wafer.
If a translucent box is placed partially outside of an opaque box, an area outside of that opaque box is exposed and thus a broken ring is formed when the resist is developed. The broken ring indicates that the neighboring fields are misaligned by an amount greater than the difference between the dimensions of that translucent box and that opaque box. Such a broken ring is also easily observable on the resist on top of the wafer.
Thus, the present invention provides anybody (e.g., operators, technicians, or engineers) the ability to rapidly and accurately verify the field-to-field alignment. Wafers that fail this check can be reworked by stripping off all the resist on the wafer surface and be realigned before the pattern is permanently etched into the silicon.


REFERENCES:
patent: 5017514 (1991-05-01), Nishimoto
patent: 5250983 (1993-10-01), Yamamura
patent: 6027859 (2000-02-01), Dawson et al.
patent: 6319791 (2001-11-01), Ando
patent: 6713843 (2004-03-01), Fu

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