Boundary cells for improving retention time in memory devices

Static information storage and retrieval – Format or disposition of elements

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365 63, 36523003, G11C 702

Patent

active

052511685

ABSTRACT:
By placing boundary cells within areas of discontinuity of a memory array, such as in word line strap areas, stress on edge cells of the memory array is reduced; the reduction of stress improves leakage characteristics and pause-refresh capabilities of edge cells. The boundary cells may further be laid out in the areas of discontinuity with the same pattern as the memory array. Some of the boundary cells may be electrically biased to act as minority carrier sinks. By collecting minority carriers that otherwise may be attracted to edge cells of the memory array, the leakage characteristics of the edge cells and their pause-refresh capabilities are further enhanced. The boundary cells are particularly useful in improving leakage characteristics of dynamic random access memory devices of the trench capacitor type.

REFERENCES:
patent: 4827449 (1989-05-01), Inoue
patent: 4855956 (1989-08-01), Urai
patent: 4967396 (1990-10-01), Kajigaya et al.
patent: 5014110 (1991-05-01), Satoh
patent: 5014246 (1991-05-01), Komatsu et al.
patent: 5097440 (1992-03-01), Konishi et al.

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