Bootstrap type output circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307578, 307270, 307269, H03K 5135, H03K 19017, H03K 19096, H03K 458

Patent

active

046331050

ABSTRACT:
An improved bootstrap output circuit which can operate stably without being influenced by noise and voltage fluctuation of the substrate. A delay circuit includes a first MIS transistor having a gate receiving a first input signal, a drain connected to a power supply and a source connected to a first node. A second MIS transistor has a gate receiving a second input signal, a drain connected to the first node and a source connected to the ground potential. A third MIS transistor has a gate receiving the second input signal, a drain connected to the power supply and a source connected to a second node. A fourth MIS transistor has a gate connected to the first node, a drain connected to the second node and a source held at the ground potential. A fifth MIS transistor has a gate connected to the second node, a drain connected to the first node and a source connected to the first input signal. The delay circuit generates an output signal from the second node the level of which falls with a predetermined delay after the rise of the first input signal. A driver circuit including a bootstrap circuit makes use of the output at the second node for controlling the charge operation of the bootstrap capacitor.

REFERENCES:
patent: 3774055 (1973-11-01), Bapat
patent: 4443714 (1984-04-01), Nakano et al.
patent: 4443720 (1984-04-01), Takemae
patent: 4447745 (1984-05-01), Takemae et al.

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