Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1995-08-31
1999-09-28
Ngo, Chuong Dinh
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
708628, G06F 738, G06F 752
Patent
active
059579994
ABSTRACT:
A multiplier which uses Booth recoding to multiply large word length operands. A first operand is fully loaded into a shift register. The loading of the second operand is then begun, with the recoding operation beginning after the loading of the minimum number of bits of the second operand required for the first stage of the recoding. The recoded portions of the second operand are used to select what factor of the first operand to use in forming the partial product terms. The partial product terms are added using carry save addition, with the least significant bits being used to form the least significant bits of the final product. The most significant bits of the final product are then formed by adding the carry save data from the partial product summations. The present invention performs squaring operations used in exponentiation functions by shifting the first operand value (A) by one bit to form twice that value (2*A) prior to multiplying by the second operand (B) to form the 2*(A*B) term needed in such calculations. This shifting is performed in the multiplexer used to select the appropriate factor of the first operand for each partial product term, rather than after the accumulation of the final product term.
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National Semiconductor Corporation
Ngo Chuong Dinh
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