Boosting seed voltage for a memory device

Details Boosting seed voltage for a memory device Boosting seed voltage for a memory device

2008-10-31

2010-11-16

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185240

Reexamination Certificate

active

07835187

ABSTRACT:
A method and device using bitline-bitline capacitance between adjacent bitlines to boost seed voltage in a memory device are provided. The method may include a precharge phase, a boost phase, an equalize phase, and a lock in phase. In one embodiment, the method may include boosting the seed voltage twice. The bitlines may be divided into one or more segments.

REFERENCES:
patent: 7064980 (2006-06-01), Cernea et al.
patent: 2007/0297234 (2007-12-01), Cernea et al.

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