Boosting circuit configured with plurality of boosting...

Details Boosting circuit configured with plurality of boosting... Boosting circuit configured with plurality of boosting...

2005-01-04

2005-01-04

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

Reexamination Certificate

active

06838928

ABSTRACT:
By supplying a clock signal from an OSC to four stages of boosting circuit units connected in series, the boosting circuit units are rendered active. A delay element is inserted in the line of the clock signal to prevent all the boosting circuit units from being rendered active at the same time by one clock signal. Since the boosting circuit unit is rendered active one by one by the provision of the delay element, current congregation from the power supply potential at the circuit element connected closest to the input terminal of the boosting circuit unit of the first stage can be prevented. Thus, a boosting circuit of a high boosting efficiency is achieved.

REFERENCES:
patent: 5180928 (1993-01-01), Choi
patent: 5191232 (1993-03-01), Wang
patent: 6075403 (2000-06-01), Ishikawa et al.
patent: 6469569 (2002-10-01), Miyamitsu
patent: 63-316510 (1988-12-01), None
patent: 07-46825 (1995-02-01), None
patent: 08306870 (1996-11-01), None

Affiliated with

Also associated with

Rating

Boosting circuit configured with plurality of boosting... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Boosting circuit configured with plurality of boosting..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Boosting circuit configured with plurality of boosting... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3389762