Boosting circuit and non-volatile semiconductor storage...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S189090, C365S189110

Reexamination Certificate

active

06912159

ABSTRACT:
A boosting circuit in which a boosting efficiency is enhanced without increasing a chip area, and a time required for reaching a desired boosting voltage different in a voltage level and current ability is shortened. A stage-number switching circuit (20), for switching a connection state between charge pump circuits (12, 13), enables clock signals (CLK1, CLK3) to be supplied to the charge pump circuit (11) among 4-phase clock signals (CLK1to CLK4) to be supplied to 2-stage charge pump circuits in the case where a stage-number switching control signal (SWHON) is at a supply voltage VDD level, is synchronized with pumping of the charge pump circuits, and turns on an internal switching transistor at a potential higher than a boosting potential of the charge pump circuit (12) in the previous stage, whereby between the 2-stage charge pump circuits (11, 12; 13, 14), a series connection is obtained.

REFERENCES:
patent: 5969988 (1999-10-01), Tanzawa et al.
patent: 6034899 (2000-03-01), Iwahashi
patent: 6366519 (2002-04-01), Hung et al.
patent: 7-111095 (1995-04-01), None

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