Booster circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

06816000

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to a booster circuit. In particular, the present invention pertains to a charge-pump-type booster circuit used in power supply circuits, etc.
BACKGROUND OF THE INVENTION
Reference numeral
101
in
FIG. 10
represents an example of a conventional booster circuit.
Said booster circuit
101
has multiple charge-pump circuits and is formed by connecting the charge-pump circuits in series. In this case, the booster circuit has 7 charge-pump circuits
102
1
-
102
7
.
The input terminal of charge-pump circuit
102
1
of the first stage is connected to power supply voltage Vcc, and its output terminal is connected to charge-pump circuit
102
2
of the second stage.
The input terminals of the charge-pump circuits of the stages subsequent to the first stage are connected to the output terminals of the charge-pump circuits of the previous stages up to the last stage, that is, the input terminals of the charge-pump circuits
102
2
-
102
6
of the second through sixth stages are connected to the output terminals of the charge-pump circuits of the respectively previous stage.
The input terminal of charge-pump circuit
102
7
of the last stage is connected to the output terminal of charge-pump circuit
102
6
of the previous stage, and its output terminal is connected to output terminal
110
via a diode
180
for preventing reverse current. The boosted voltage can be output from said output terminal
110
to the load circuit (not shown in the figure). Also, an output capacitor
190
is connected between output terminal
110
and ground.
The internal configuration of each charge-pump circuit
102
is the same. Each charge-pump circuit is comprised of diode
103
, gate circuit
104
, and capacitor
105
.
The anode terminal of each diode
103
is used as the input terminal of each charge-pump circuit
102
. The anode terminal of diode
103
1
of charge-pump circuit
102
1
of the first stage is connected to power supply voltage Vcc. The anode terminals of diodes
103
2
-
103
7
of charge-pump circuits
102
2
-
102
7
from the second stage on are connected to the cathode terminals of diodes
103
1
-
103
6
of charge-pump circuits
102
1
-
102
6
of the previous stage. The cathode terminal in charge-pump circuit
102
7
of the last stage is connected to output terminal
110
via diode
180
for preventing the flow of reverse current.
One terminal of each capacitor
105
is connected to the cathode terminal of one of diodes
103
1
-
103
7
, and the other terminal of capacitor
105
is connected to the output terminal of gate circuit
104
to be described below.
Gate circuit
104
is an inverter circuit. The input terminal of the gate circuit is used as the control terminal of the charge-pump circuit where the control signal is input. When a high-level control signal is input, the terminal of capacitor
105
on the low-potential side is connected to ground GND. When a low-level control signal is input, the terminal of capacitor
105
on the low-potential side is connected to power supply voltage Vcc.
When a high-level control signal is input to gate circuit
104
1
of the first stage, gate circuit
104
1
of the first stage connects the terminal of capacitor
105
1
on the low-potential side of charge-pump circuit
102
1
of the first stage to ground GND. At that time, since the power supply voltage Vcc is applied to the anode terminal of diode
103
, of charge-pump circuit
102
1
of the first stage, diode
103
, is forward-biased, and capacitor
105
, is charged to the power supply voltage Vcc.
Next, when a low-level control signal is input to gate circuit
104
1
of charge-pump circuit
102
1
in the first stage, the terminal of capacitor
105
, on the low-potential side is connected to power supply voltage Vcc, and the voltage at the terminal of capacitor
105
on the high-potential side is boosted by as much as the power supply voltage Vcc from the charged voltage (Vcc) on capacitor
105
1
to becomes 2Vcc. Since the potential at the anode terminal of diode
103
1
in charge-pump circuit
102
1
of the first stage is the power supply voltage Vcc, which is less than the potential at the cathode terminal, diode
103
1
is reverse-biased.
In that state, gate circuit
104
2
of charge-pump circuit
102
2
of the second stage connects the terminal of capacitor
105
2
on the low-potential side to ground GND. Since 2Vcc is applied to the anode terminal of diode
103
2
of charge-pump circuit
102
2
of the second stage, diode
103
2
is forward-biased, and capacitor
105
2
of charge-pump circuit
102
2
of the second stage is charged by the boosted voltage 2Vcc.
Next, when gate circuit
104
2
of charge-pump circuit
102
2
of the second stage connects the terminal of capacitor
105
2
on the low-potential side to power supply voltage Vcc, the voltage at the terminal of capacitor
105
2
on the high-potential side is boosted by as much as the power supply voltage Vcc from the charged voltage (2Vcc) on capacitor
105
2
to become 3Vcc. Since the output voltage 2Vcc of charge-pump circuit
102
1
of the first stage is applied to the anode terminal of diode
103
2
of the second stage, diode
103
2
of the second stage is reverse-biased by the boosted voltage 3Vcc.
At that time, when a high level control signal is input to gate circuit
104
3
of charge-pump circuit
102
3
of the third stage, gate circuit
104
3
of charge-pump circuit
102
3
of the third stage connects the terminal of capacitor
105
3
on the low-potential side of the third stage to ground GND, and said capacitor
105
3
is charged by the boosted voltage 3Vcc on charge-pump circuit
102
2
of the second stage.
In said booster circuit
101
, the voltage input to each of charge-pump circuits
102
1
-
102
6
is boosted by as much as the power supply voltage Vcc as described above. As a result, a voltage equal to (number of charge-pump circuit stages+1)×Vcc, that is, 8Vcc is output from charge-pump circuit
102
7
of the last stage to a load circuit (not shown in the figure) via diode
180
which is used to prevent the flow of reverse current, at output terminal
110
.
In the steady state, each capacitor
105
of said charge-pump circuit
102
is initially charged to a voltage corresponding to the number of stages of charge-pump circuits
102
. On the other hand, since the voltage across the two terminals of each capacitor
105
is 0 V before the booster circuit is started, the amount of the electric charge on each capacitor
105
at steady state is greater than that when the booster circuit is started.
Conventionally, the time needed for each capacitor to be charged to a prescribed level when the booster circuit is started can be shortened by increasing the drivability of gate circuit
105
in advance. In this case, since each gate circuit
105
has a drivability higher than the essential level in the steady state, power consumption and noise also become higher than the essential level in the steady state.
In said booster circuit
101
, when a high-level control signal is input to gate circuit
104
n
of charge-pump circuit
102
n
of a given stage to boost the voltage by as much as the power supply voltage Vcc, low level signals must be input to gate circuits
104
n−1
and
104
n+1
of the charge-pump circuits of the previous and subsequent stages. Therefore, it is preferred to input control signals of opposite phase to the gate circuits of neighboring stages.
Consequently, said conventional booster circuit
101
has a signal-generating circuit
108
used for generating control signals. The same first control signal is input to gate circuits
104
1
,
104
3
,
104
5
, and
104
7
of the charge-pump circuits of the odd-numbered stages, while a second control signal of different phase than the first control signal is input to gate circuits
104
2
,
104
4
, and
104
6
of the charge-pump circuits of the even-numbered charge-pump circuits. In this case, the first and second control signals have opposite phase.
In this case, since the same first control signal

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