Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source
Reexamination Certificate
2001-06-07
2003-06-17
Vu, Bao Q. (Department: 2838)
Electricity: power supply or regulation systems
In shunt with source or load
Using choke and switch across source
C323S223000, C323S282000, C323S288000
Reexamination Certificate
active
06580252
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of direct current (dc) power supplies designed for converting a given dc voltage to another dc voltage or dc current. More particularly, the present invention relates to utilization of enhancement mode Junction Field Effect Transistors (JFET) to construct dc-dc converters commonly known as boost converters.
2. Related Art
Modern electronic circuit applications frequently require dc power supplied at several different voltage levels. It is often desirable to produce multiple dc voltage levels from a single dc voltage source by means of electronic circuits. This is particularly true in portable equipment Where batteries are utilized either as the primary source of electrical energy or as the backup power source. Laptop computers, Personal Digital Assistants (PDA), pagers and cell phones all have such requirements. In a class of electronic circuits known as dc-dc converters, electric energy is transferred between two dc circuits operating at different voltage and current levels. Included in these circuits are the buck converter, the boost converter, and the buck-boost converter.
The boost converter is a direct switching circuit for converting input dc current to output dc voltage. The boost converter is used in a wide range of circuit applications including dc motor controllers and switching power supplies. The output voltage of the boost converter is always equal to or greater than an input or source voltage. The basic circuit is a two-port network having a pair of input terminals and a pair of output terminals. The single dc power source is connected across the two input terminals and a dc load is connected across the two output terminals. Within the two-port, the ideal circuit consists of two switching devices, appropriate control circuitry for the two switching devices, and a single inductor.
An ideal switching device has an on state and an off state. In the on state, a device conducts an electric current between two terminals with zero voltage drop across the terminals. In the off state, a device will support any voltage drop across two terminals while conducting zero current between the two terminals. A number of different electronic devices are used as switches in boost converters, all of which depart from the ideal in one or more respects. Some examples of such devices include semiconductor diodes, bipolar junction transistors (BJT), field effect transistors (FET), and silicon controlled rectifiers (SCR). In the boost converter circuit, the ratio of output voltage to input voltage is frequently limited due to the forward voltage drop across the terminals of one or both of the switching devices.
Another major concern with conventional switching devices is the non-zero voltage between the two current conducting terminals while in the on state. The result is power dissipation in the switching device with excessive heat generation and a reduction in overall circuit efficiency. A second major concern stems from the dynamic behavior of the switching devices. That is, the speed with which a device will transition between the on and the off states. Limits on both frequency of operation and duty cycle result from slow switching speeds. Every time a device switches between states, a certain amount of energy is lost. The slower the device switching time, the greater the power loss in the circuit. The effects become very important in high frequency (fast switching) and/or high power circuits where as much as 50% of the losses are due to excessive switching transition time.
SUMMARY OF THE INVENTION
Accordingly, what is needed is a switching device useful in dc power supply circuits that will approach the operation of an ideal switching device. What is further needed is a switching device that has close to zero volts across its conduction terminals while in the on or current conducting state. What is also needed is a switching device that is capable of operating in switching power supplies at higher operating frequencies by virtue of very short transition times between states. What is needed yet is a switching device having very low terminal voltage in the on state and very short transition times between states that can be used in high power circuits. The present invention provides these advantages and others not specifically mentioned above but described in the sections to follow.
An enhancement mode JFET as a switching device in a boost converter circuit combined with a single rectifier diode and an inductor. A control circuit coupled to the gate of the JFET switches the JFET between a current conducting state and a current blocking state. The ratio of converter dc output voltage to converter dc input voltage is determined by the ratio of JFET conducting time to the sum of JFET conducting time and JFET blocking time. This pulse width modulation scheme is thus used to adjust the dc output voltage level.
Limits on both frequency of operation and duty cycle result from slow switching speeds. Each time a device switches between states, a certain amount of energy is lost. The slower the device switching time, the greater the power loss in the circuit. The effects become very important in high frequency (fast switching) and/or high power circuits where as much as 50% of the losses are due to excessive switch transition time.
The enhancement mode JFET is an excellent switch since it has a very small internal resistance between source and drain in the conducting state as well as a very small terminal voltage. As a result, very little power is dissipated in the JFET itself. Furthermore, the current carriers in the JFET are all majority carriers which results in very short switching transition times. As a result, the present invention offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In one embodiment of the present invention, a boost converter using a normally off JFET is constructed in the form of a two-port network. The negative input terminal is electrically connected to the negative output terminal to form a common ground. A dc power source is connected across the terminals of the input port. A normally off, or enhancement mode, n-channel JFET is used as a switching device with drain connected to the common ground and source connected to an internal common node. Control circuitry within the two-port applies a switching control signal to the gate of the JFET. The internal circuit consists of a semiconductor diode, an inductor and a capacitor. The anode of the diode is connected to the internal common node and the cathode is connected to the positive output terminal. The inductor is connected between the internal common node and the positive input terminal. The capacitor is connected across the output terminals. The JFET has very low terminal voltage source to drain when in the on or conducting state. That is to say, the JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFET are all majority carriers which results in very short switching transition times. As a result, this circuit offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In a second embodiment, an n-channel enhancement mode and a p-channel enhancement mode JFET are used as switching devices in a boost converter circuit. The circuit topology is the same as the first configuration with the diode replaced by the p-channel JFET. The p-channel JFET is connected with source to the common internal node and drain to the positive output terminal. The gates of the two JFETs are connected together, and a switching signal is applied to the gates by means of an internal control circuit. Both JFETs have a very low terminal voltage source to drain when in the on or conducting state. That is to say, each JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFETs are all majority carriers which res
Lovoltech Inc.
Vu Bao Q.
Wagner , Murabito & Hao LLP
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