Metal fusion bonding – With means to juxtapose and bond plural workpieces – Plural discrete workpieces
Reexamination Certificate
2002-06-24
2004-11-09
Stoner, Kiley (Department: 1725)
Metal fusion bonding
With means to juxtapose and bond plural workpieces
Plural discrete workpieces
C228S015100, C228S180210
Reexamination Certificate
active
06814274
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a bonding tool for use in a semiconductor device manufacturing process for electrically connecting input and output terminals of an IC chip to an outside circuitry. In particular, this invention relates to a bonding method for connecting inner leads of TAB tapes, as well as a bonding tool for use in the bonding method.
With the development of civil information apparatuses having more and more sophisticated functions, there has been a remarkable increase in the number of input and output terminals of IC (Integrated Circuit) chips used in these apparatus. Conventionally, there has been known a method called TAB (Tape Automated Bonding) for use in electrically connecting IC chips having a great number of input and output terminals to an outside circuitry. According to such TAB method, each TAB tape comprising an insulating tape and a predetermined wiring pattern formed on the insulating tape is used for connecting an IC chip to an outside circuitry.
An electric connection between a TAB tape and an IC chip can usually be effected by using a method called Inner Lead Bonding Process. According to this method, at first, a plurality of input and output terminals are arranged on an IC chip and located near edges on its mounting surface. Then, a plurality of openings called device holes for mounting an IC chip are formed in a TAB tape. Subsequently, a plurality of inner leads forming a wiring pattern are caused to protrude from the edges of these openings, in a pattern corresponding to an input and output terminal arranging pattern on the IC ship. Afterwards, the inner leads are pressed and thus bonded onto a plurality of electrode pads formed on the IC chip, using a bonding tool.
At this time, as one of the most commonly used bonding methods for bonding the inner leads onto the corresponding electrode pads, it is allowed to use a gang bonding method which is capable of simultaneously bonding the inner leads onto all of the electrode pads.
Such a gang bonding method requires that a plurality of electrode bumps (formed by a metal such as gold) be formed in advance on the input and output terminals of an IC chip
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. Then, a bonding tool is used which has a flat bottom surface having almost the same size as the IC chip. The bottom surface of the bonding tool is thus caused to press all the inner leads, so that these inner leads can be bonded onto the electrode pads provided in advance on the IC chip.
In this way, since the gang bonding method can be used to bond all the inner leads onto the input and output terminals on an IC chip during only one operation, the bonding operation is allowed to be finished in a reduced time period, thereby ensuring an extremely high productivity. However, on the other hand, since it is necessary to form (in advance) electrode bumps for later connection between the inner leads and the input and output terminals on an IC chip, it is difficult to avoid an increase in the production cost.
In order to inhibit an increased production cost caused due to the formation of electrode bumps, Japanese Unexamined Patent Publication No. 53-52365 has disclosed a bumpless TAB process in which inner leads of TAB tapes are directly bonded onto aluminum pads forming input and output terminals on an IC chip, without having to form electrode bumps. In carrying out such bumpless process, since an oxide film formed on each aluminum pad has to be removed, is preferable to use a supersonic bonding method in which a supersonic vibration is applied to a bonding tool pressing inner leads against the aluminum pads, thereby bonding the inner leads onto the aluminum pads.
However, when the bumpless TAB process is used to bond all the inner leads to the aluminum pads in only one operation, a strong pressing force will be unduly applied to some of the inner leads, causing an unfavorable effect on the IC chip. Another problem might be that it is difficult to ensure a sufficient pressing force, resulting in an insufficient bonding. In order to avoid these problems, it is required that the bonding process be performed under a condition where a pressing force is uniformly applied to all the inner leads. However, if a pressing force is to be uniformly applied to all the inner leads, it is necessary to adjust, with a high precision, a parallelity between an IC chip and a bonding tool. In view of this, a conventional bumpless TAB method employs a single point bonding manner for bonding inner leads one by one. As a result, it is difficult for a conventional bumpless TAB method to avoid a greatly lower productivity than the above-described gang bonding method.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improved bonding method capable of avoiding the above-described problems and an improved bonding tool for use in the improved bonding method.
According to one aspect of the present invention, there is provided a bonding tool for bonding, by using a predetermined pressing force, a plurality of inner leads to a plurality of electrode pads. The electrode pads are those formed in advance on an IC (Integrated Circuit) chip, and the inner leads are those protruding from TAB (Tape Automated Bonding) tapes and arranged in parallel to one another at an interval corresponding to an interval between every two electrode pads. In particular, when viewed in a first direction, a cross section of a pressing surface of the bonding tool for pressing the inner leads is flat and extends uniformly over a range longer than the interval between every two electrode pads. When viewed in a second direction orthogonal to the first direction, the length of a pressing area is shorter than the length of each electrode pad. The pressing area is where a pressing force acts between the inner leads and the electrode pads when the inner leads are pressed to the electrode pads by virtue of a predetermined pressing force.
According to another aspect of the present invention, there is provided a bonding method, with using the bonding tool, of bonding a plurality of inner leads to a plurality of electrode pads by means of a predetermined pressing force. The electrode pads are those formed in advance on an IC chip, and the inner leads are those protruding from TAB tapes and arranged in parallel to one another at an interval corresponding to an interval between every two electrode pads. The method comprises the steps of positioning the IC chip and the TAB tapes in a manner such that the respective inner leads are located on the corresponding electrode pads; and using the bonding tool to make its pressing surface to get into contact with the inner leads, in a manner such that the flat portion of the pressing area uniformly extending in a range longer than an interval between every two electrode pads will become parallel to an arranging direction of the electrode pads, while the central portion of the pressing area when viewed in the second direction orthogonal to the first direction is located in the center of each electrode pad, thereby bonding the plurality of inner leads to the electrode pads in one operation.
Other configurations and advantages of the present invention will become apparent by reading the present specification.
REFERENCES:
patent: 6183589 (2001-02-01), Kim et al.
patent: 4-119641 (1992-04-01), None
patent: 1998-073406 (1998-11-01), None
Inomata Teruji
Kurita Yoichiro
Katten Muchin Zavis & Rosenman
NEC Electronics Corporation
Stoner Kiley
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