Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation
Reexamination Certificate
2002-11-04
2004-12-07
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Electromagnetic or particle radiation
C257S678000, C257S691000, C257S692000
Reexamination Certificate
active
06828643
ABSTRACT:
FIELD
This invention relates to the field of integrated circuits. More particularly, this invention relates to integrated circuit design.
BACKGROUND
Input output cells, referred to herein as input circuits, deliver input signals to and carry output signals from monolithic integrated circuits. The input circuits are typically disposed near a peripheral edge of the integrated circuit, and are connected to bonding pads through which electrical connections are made to other elements of a larger circuit, such as a package for the integrated circuit.
Input circuits are typically electrically connected to two electrical buses, being VDDio and VSSio. In general terms, these two buses comprise the power and ground signals used to power the input circuits. The power and ground buses are typically disposed in two concentric rings around the peripheral edge of the integrated circuit.
Integrated circuits are typically laid out with the bonding pads closest to the peripheral edge of the integrated circuit. The bonding pads are then electrically connected via electrically conductive traces to the input circuits, which are disposed concentrically within the ring or rings of bonding pads, closer in towards the center of the integrated circuit. The two buss lines may then be disposed in concentric loops within the ring of input circuits. With the bonding pads, input circuits, and two buss lines all disposed in such separate concentric rings around the periphery of the integrated circuit, a tremendous amount of surface area is consumed.
As the number of devices on the integrated circuit has generally increased, and the overall size of the integrated circuit has generally decreased, the space required for the buss lines, bonding pads, and input circuits has become more of a problem when integrated circuits are laid out, in that they tend to increase the size of the integrated circuit beyond what is required for the functional circuitry.
There is a need, therefore, is an integrated circuit design in which less space is required for the input circuits, bonding pads, and buss lines.
SUMMARY
The above and other needs are met by an integrated circuit having functional circuitry within a core portion of the integrated circuit. Input circuits are disposed on a first layer within a peripheral portion of the integrated circuit, where the input circuits are electrically connected to the functional circuitry. Power and ground buss lines are disposed on a second layer within the peripheral portion of the integrated circuit, where the second layer overlies the first layer. The power and ground buss lines overlie the input circuits, and are electrically connected to the input circuits. Bonding pads are disposed on a third layer within the peripheral portion of the integrated circuit, where the third layer overlies the second layer. The bonding pads overlie the power and ground buss lines and the input circuits, and are electrically connected to the input circuits.
In this manner, less space is required for the input functions of the integrated circuit, because the input circuits, buss lines, and bonding pads are disposed on overlying layers. By making better use of vertical space in this manner, less horizontal space is required for the input functions, and the integrated circuit die dimensions can be made commensurately smaller.
In various preferred embodiments, the bonding pads are disposed in concentric rows, where the bonding pads may alternately be aligned between adjacent concentric rows or offset one to another between adjacent concentric rows. The bonding pads may alternately be configured for either wire bonding or stud bonding.
REFERENCES:
patent: 5340771 (1994-08-01), Rostoker
patent: 5672911 (1997-09-01), Patil et al.
patent: 6008534 (1999-12-01), Fulcher
patent: 6057169 (2000-05-01), Singh et al.
patent: 6064113 (2000-05-01), Kirkman
Ha Nathan W.
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Pham Long
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