Bonding pad design for impedance matching improvement

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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C257S758000

Reexamination Certificate

active

06919621

ABSTRACT:
The present invention is a bonding pad structure for improving impedance matching that can optimize the impedance matching of the loop between the chip and the substrate inside the package so as to improve the electrical characteristics of the package structure by increasing the capacitance of the loop through a simple structural refinement of the bonding pad structure. The aforesaid bonding pad structure has function of signal transmission and grounding for electronic components having multiple electrical-connected layers, furthermore, the feature of the foregoing structure is as following: the space between two bonding pads exists a metal structure constructed using a plurality of parallel-positioned metal layers which are overlapping and disconnected to one another.

REFERENCES:
patent: 5904499 (1999-05-01), Pace
patent: 6147857 (2000-11-01), Worley et al.
patent: 6282095 (2001-08-01), Houghton et al.
patent: 6486549 (2002-11-01), Chiang
patent: 6703656 (2004-03-01), Keeth et al.

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