Bonding method of semiconductor and laminated structure...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step

Reexamination Certificate

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Details

C438S107000, C438S113000, C257SE21499, C257SE21508, C257SE21519

Reexamination Certificate

active

07618847

ABSTRACT:
A bonding method (three-dimensional mounting) of semiconductor substrates is provided to sequentially bond a principal surface of a silicon wafer on which coupling bumps are formed, and a principal surface of the other silicon wafer on which pads are formed, by an adhesive applied to at least one of the principal surfaces. However, there is a problem of poor electrical coupling due to displacement of the bumps and the pads when bonded together. The present invention solves such a problem by conducting temporary positioning of the silicon wafers, adjusting the positions of the coupling bumps and pads while confirming the positions by a method such as x-ray capable of passing through the silicon wafers, and bonding the bumps and the pads together while hardening an interlayer adhesive provided between the principal surfaces of the silicon wafers by thermocompression.

REFERENCES:
patent: 7109060 (2006-09-01), Fukazawa
patent: 2004/0207082 (2004-10-01), Yamano et al.
patent: 2005/0136568 (2005-06-01), Fukazawa
patent: 2007/0048902 (2007-03-01), Hiatt et al.
patent: 2008/0122117 (2008-05-01), Pendse
patent: 1686623 (2006-08-01), None
patent: 2003-249620 (2003-09-01), None
patent: 2004-319707 (2004-11-01), None
patent: 2005-136187 (2005-05-01), None
patent: 2005-183580 (2005-07-01), None
patent: 2005-302858 (2005-10-01), None
patent: 2006-100656 (2006-04-01), None

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