Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Patent
1997-06-03
1998-06-09
Whitehead, Carl W.
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
438129, H01C 2208
Patent
active
057632987
ABSTRACT:
An integrated circuit having a first and second bond pads, a latch circuit, and a voltage lead. Different configurations of the internal circuitry of the integrated circuit are selected by applying the voltage lead either to the first or second bond pads. This result is achieved because the latch circuit, coupled between the first and second bond pads, is capable of inverting the voltage response seen at the first bond pad.
REFERENCES:
patent: 4985641 (1991-01-01), Nagayama et al.
patent: 5285069 (1994-02-01), Kaibara et al.
patent: 5303180 (1994-04-01), McAdams
Cordoba Michael V.
Parris Michael
Manzo Edward D.
Murphy Mark J.
Nippon Steel Semiconductor Corporation
United Memories Inc.
Whitehead Carl W.
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