Bond pad design

Details Bond pad design Bond pad design

2006-04-04

2006-04-04

Lee, Eddie (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S773000, C257S736000, C257S786000, C257S758000, C257S676000, C257S702000, C257S748000, C257S701000, C257S759000

Reexamination Certificate

active

07023067

ABSTRACT:
A bonding pad for an integrated circuit, where the bonding pad overlies a fragile dielectric layer. A lower metal layer stack overlies the fragile dielectric layer, and a hard dielectric layer overlies the lower metal layer stack. An upper metal layer stack overlies the hard dielectric layer, where the upper metal layer stack forms voids extending into the upper metal layer stack from an exposed upper surface of the upper metal layer stack. The voids define deformable protrusions in the upper surface of the upper metal layer stack, for at least partially absorbing forces applied to the bonding pad during a bonding operation. Electrically conductive vias extend from the lower metal layer stack through the hard dielectric layer to the upper metal layer stack, and electrically connect the lower metal layer stack to the upper metal layer stack.

REFERENCES:
patent: 6100589 (2000-08-01), Tanaka
patent: 6251789 (2001-06-01), Wilson et al.
patent: 6297562 (2001-10-01), Tilly
patent: 6657302 (2003-12-01), Shao et al.
patent: 2002/0145201 (2002-10-01), Armbrust et al.

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