Board-on-chip packages

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S706000

Reexamination Certificate

active

07443022

ABSTRACT:
The invention encompasses a board-on-chip package comprising an insulative substrate having circuitry thereon and an opening therethrough. A semiconductive-material-comprising die is adhered to the substrate and electrically connected to the circuitry with a plurality of electrical interconnects extending through the opening. A metal foil is in physical contact with at least a portion of the die. The invention also encompasses a method of forming a plurality of board-on-chip packages. An insulative substrate is provided. Such substrate has a repeating circuitry pattern thereon, and a plurality of openings therethrough. The openings are in a one-to-one correspondence with individual of the repeated circuitry patterns. A plurality of semiconductive-material-comprising dies are adhered to the substrate. Circuitry supported by the dies is electrically connected with the circuitry on the substrate utilizing a plurality of electrical interconnects extending through the openings. A metal foil is joined to the substrate and extended over the plurality of dies. The substrate and metal foil are cut to form singulated die packages comprising a single die, a portion of the substrate having a single repeated pattern of the circuitry, and a portion of the metal foil.

REFERENCES:
patent: 3572428 (1971-03-01), Monaco
patent: 4054901 (1977-10-01), Edwards et al.
patent: 4235285 (1980-11-01), Johnson et al.
patent: 4422090 (1983-12-01), Shepherd et al.
patent: D282838 (1986-03-01), McCarthy
patent: 4961125 (1990-10-01), Jordan et al.
patent: 5021300 (1991-06-01), Stacey
patent: 5248895 (1993-09-01), Nakazawa
patent: 5289346 (1994-02-01), Carey et al.
patent: 5300812 (1994-04-01), Lupinski et al.
patent: 5352851 (1994-10-01), Wallace et al.
patent: 5359768 (1994-11-01), Haley
patent: 5442231 (1995-08-01), Miyamoto et al.
patent: 5559369 (1996-09-01), Newman
patent: 5650593 (1997-07-01), McMillan et al.
patent: 5661086 (1997-08-01), Nakashima et al.
patent: 5677566 (1997-10-01), King et al.
patent: 5723907 (1998-03-01), Akram
patent: 5726079 (1998-03-01), Johnson
patent: 5739585 (1998-04-01), Akram et al.
patent: 5773884 (1998-06-01), Andros et al.
patent: 5817535 (1998-10-01), Akram
patent: 5857767 (1999-01-01), Hochstein
patent: 5927517 (1999-07-01), Lipman et al.
patent: 5972736 (1999-10-01), Malladi et al.
patent: 5985697 (1999-11-01), Chaney et al.
patent: 5990550 (1999-11-01), Umezawa
patent: 5998241 (1999-12-01), Niwa
patent: 5998860 (1999-12-01), Chan et al.
patent: 5998865 (1999-12-01), Akram
patent: 5999415 (1999-12-01), Hamzehdoost
patent: 6008074 (1999-12-01), Brand
patent: 6020637 (2000-02-01), Karnezos
patent: 6048755 (2000-04-01), Jiang et al.
patent: 6107683 (2000-08-01), Castro
patent: 6122171 (2000-09-01), Akram et al.
patent: 6198162 (2001-03-01), Corisis
patent: 6214641 (2001-04-01), Akram
patent: 6215180 (2001-04-01), Chen et al.
patent: 6225695 (2001-05-01), Chia et al.
patent: 6229227 (2001-05-01), Muthukumaraswamy et al.
patent: 6249041 (2001-06-01), Kasem et al.
patent: 6255140 (2001-07-01), Wang
patent: 6271586 (2001-08-01), Shen
patent: 6284571 (2001-09-01), Corisis et al.
patent: 6300165 (2001-10-01), Castro
patent: 6326687 (2001-12-01), Corisis
patent: 6343019 (2002-01-01), Jiang et al.
patent: 6399425 (2002-06-01), Brand et al.
patent: 6461894 (2002-10-01), Brand
patent: 6492724 (2002-12-01), Gaynes et al.
patent: 6498052 (2002-12-01), Brand
patent: 6507114 (2003-01-01), Hui et al.
patent: 6507116 (2003-01-01), Caletka et al.
patent: 6518098 (2003-02-01), Corisis
patent: 6528890 (2003-03-01), Brand
patent: 6586280 (2003-07-01), Cheah
patent: 6743658 (2004-06-01), Corisis
patent: 6825550 (2004-11-01), Akram
patent: 6917107 (2005-07-01), Akram
“How to Make IC Package”; www.msato@iis.u-tokyo.ac.jp; Aug. 31, 1998, 10 pps.
SLD4M18DR400 4 MEG X 18 SLDRAM; www.sldram.com; 1998, 12 pps.
Tummala et al.; Microelectronics Packaging Handbook; 1997, Chapman & Hall vol. II; pp. 898-901.
Tummala et al.; Microelectronics Packaging Handbook; 1997, Chapman & Hall vol. III; pp. 223-234.
“Easy Heatsink Mods to Drop CPU Temps;” Wagner et al.; http://www.overclockers.com/tips188; Sep. 1, 2000, 7 pps.
“Cooling Fundamentals: Thermal Conductivity;” http://www.frostytech.com/articleview.cfm?articleID=233; 1997; 3 pps.
“Silver;” http://en.wikipedia.org/wiki/Silver; 2001; 4 pps.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Board-on-chip packages does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Board-on-chip packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Board-on-chip packages will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4006430

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.