Board on chip package and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S112000, C438S612000

Reexamination Certificate

active

08003439

ABSTRACT:
A method of manufacturing a board on chip package including laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; removing the dry film; laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; mounting a semiconductor chip on the solder ball pad by a flip chip bonding; molding the semiconductor chip with a passivation material; removing the carrier film and the thin metal film; and laminating a lower photo solder resist under the solder ball pad. The board on chip package provides a high density circuit since a circuit pattern is formed using a seed layer.

REFERENCES:
patent: 7081403 (2006-07-01), Kirloskar et al.
patent: 7507602 (2009-03-01), Sunohara
patent: 2006/0163722 (2006-07-01), Hsu
patent: 2008/0003716 (2008-01-01), Takahashi
patent: 2008/0009098 (2008-01-01), Lee et al.
patent: 2010/0019368 (2010-01-01), Shin
U.S. Appl. No. 11/715,906, filed Mar. 9, 2007, Myung-Sam Kang, et al., Samsung Electro-Mechanics Co., Ltd.

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