Blocks and bits sequence reversing device using barrel shift

Details Blocks and bits sequence reversing device using barrel shift Blocks and bits sequence reversing device using barrel shift

1990-07-03

1993-11-23

Harrell, Robert B.

Boots, shoes, and leggings

395200, 395275, 395325, 395375, 395400, 395425, 395550, 395725, 395775, 36471508, 3649261, 3649265, 364947, 3649473, 3649476, 3649311, 364DIG2, 377 69, G06F 700, G06F 500, G11C 1900

Patent

active

052652599

ABSTRACT:
A bit sequence reversing device for reversing a sequence of data having a plurality of blocks, each block having a predetermined number of bits. The bit sequence reversing device includes a block reversing unit for reversing a sequence of at least two of the blocks; and a plurality of bit reversing units, each corresponding to one of the blocks, each of the bit reversing units reversing a sequence of the bits in the corresponding block. The block reversing unit includes a barrel shift unit. The barrel shift unit includes first and second input latch circuits for receiving the data; a series of left shift registers, connected to the first input circuit, for shifting the output of the first input latch circuit on the left direction, a series of right shift registers, connected to the second input circuit, for shifting the output of the second input latch circuit on the right direction; a first output control circuit, connected to a post-stage of one of the left shift registers, for selectively outputting data thereof; and a second output control circuit, connected to a post-stage of one of the right shift registers, for selectively outputting data thereof. The bit sequence reversing device reduces execution time without increasing the structural elements thereof, and since the reversing operation of blocks is adjusted, various types of reversing operations are possible.

REFERENCES:
patent: 3226693 (1965-12-01), Dumey
patent: 4506364 (1985-03-01), Aichelmann, Jr. et al.
patent: 4779223 (1988-10-01), Asai et al.
patent: 4782457 (1988-11-01), Cline
patent: 4951226 (1991-01-01), Neki
patent: 5012441 (1991-04-01), Retter
"Data Format and Bus Compatibility in Multiprocessors", 8207 IEEE Micro, vol. 3, (1983), Aug., No. 4, Amsterdam, Nederland.

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