Block select circuit in a flash memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185270

Reexamination Certificate

active

06909640

ABSTRACT:
Disclosed is a block select circuit in a flash memory device. The block select circuit comprises a select unit including a flash memory cell that is programmable and erasable by a given voltage condition, for outputting a block select signal depending on address signals and a state of the flash memory cell, a high-voltage pumping unit for outputting a signal to keep a given high voltage according to the block select signal and the clock signal, and a switching unit for applying a given bias to a gate select line, a word line and a source select line of a flash memory cell block according to the output signal of the high-voltage pumping unit. A given voltage is not applied to a fail block by only the operation of programming the flash memory cell of an erase state. Therefore, it is possible to process a fail block even after being packaged.

REFERENCES:
patent: 6597603 (2003-07-01), Lambrache et al.

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