Block placement method

Details Block placement method Block placement method

1989-07-27

1990-10-16

Lall, Parshotam S.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1560

Patent

active

049640577

ABSTRACT:
A block placement method and system for automatically placing a plurality of blocks on a substrate. A temporary groundwork design is established which does not contain a block placement inhibited area, such area being reserved from power lines. Initially, the blocks are placed upon the temporary groundwork design in a provisional groundwork design. An extended block is obtained upon inserting a block placement inhibited areas into the provisional groundwork design. Wiring is routed within the extended block on a placed substrate.

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patent: 4593363 (1986-06-01), Burstein et al.
patent: 4630219 (1986-12-01), DiGiacomo et al.
patent: 4686629 (1987-08-01), Noto et al.
patent: 4700317 (1987-10-01), Watanabe et al.
patent: 4754408 (1988-06-01), Carpenter et al.
"A Routing Program Applicable to Various Chip Structures of Gate Arrays", Joho Shori Gakkai, Ronbunshi, vol. 25, No. 3, May 1984, pp. 357-364.
Mead et al, Introduction to VLSI Systems, pp. 38-45 (1980).
VLSI Design, vol. V, No. 4, pp. 35-43, Apr. 1984, Robson, Gary, "Automatic Placement and Routing of Gate Arrays".

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