Block parallel efuse apparatus blown with serial data input

Details Block parallel efuse apparatus blown with serial data input Block parallel efuse apparatus blown with serial data input

2003-01-10

2004-04-13

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Fusible link or intentional destruct circuit

C327S526000

Reexamination Certificate

active

06720820

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a block parallel efuse apparatus blown with serial data input.
2. Description of the Related Art
When an efuse is blown, it takes more time to blow or read serial data. For example, a 0.175 um efuse needs 125 us to be blown in. The more efuses deployed, more time, proportional to the efuses, is required for the fuses to be blown in.
There is thus a need for a block parallel efuse apparatus blown with serial data.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to shorten the time for blowing efuses.
To achieve the above objects, the present invention provides a block parallel efuse apparatus blown with serial data input.
The block parallel apparatus includes a high voltage source, efuse circuits, a plurality of multiplexes, registers, and an input-output terminal. Each efuse circuit includes an efuse, a blown-control terminal, an input terminal, and an output terminal. Each efuse is coupled between the high voltage source and the output terminal of the efuse circuit. Each blown-control terminal is coupled to a blown-control line. Each multiplex includes a first input terminal, a second input terminal, a control terminal, and an output terminal. The second input terminal of each multiplex is coupled to an output terminal of each corresponding efuse circuit. The control terminal of each multiplex receives a load signal. Each register includes an input terminal, an output terminal, and a control terminal. The input terminal of each register is coupled to the output terminal of each corresponding multiplex. The output terminal of each register is coupled to the first input terminal of another corresponding multiplex and coupled to the input terminal of each corresponding efuse circuit. The control terminal of each register is coupled to a clock line and the input-output terminal for inputting and reading serial data.


REFERENCES:
patent: 6489832 (2002-12-01), Kim et al.

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