Block normalization processor

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G10L 300

Patent

active

057271232

ABSTRACT:
A method and apparatus for implementing a vocoder in a application specific integrated circuit (ASIC) is provided. The apparatus contains a DSP core that performs computations in accordance with a reduced instruction set (RISC) architecture. The circuit further includes a specifically designed slave processor to the DSP core referred to as the minimization processor. The apparatus further comprises a specifically designed block normalization circuitry.

REFERENCES:
patent: 4789956 (1988-12-01), Hiderbrandt
patent: 5414796 (1995-05-01), Jacobs et al.
patent: 5491773 (1996-02-01), Veldhius et al.
IEEE International Conference on Communication, ICC 90; Chung et al, "Gain Normalization in a 4200 BPS Homomorphic Vocoder", pp. 942-946, vol. 3, Apr. 1990.

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