Block noise prevention by selective interpolation of decoded ima

Facsimile and static presentation processing – Facsimile – Reduced time or bandwidth for static image communication

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3582613, 358432, 382232, H04N 141

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active

058284672

ABSTRACT:
An image processor for improving the quality of a picture, in which block noise arises as a result of a block encoding operation, by rendering gradations between blocks contiguous. A control point determination section reads references pixels from a decoded image storage section in accordance with a block address output from a block address generating section. The control point determination section then outputs control point information. A boundary condition determination section determines vector information on the basis of the control point information. An interpolating section interpolates a pixel block using a bicubic interpolated surface, and the thus interpolated pixel block is held in a buffer. A control point comparison section determines whether the pixel block can be interpolated and outputs prohibition information. On the other hand, a pixel block output from an 8 by 8 pixel block reading section is held in another buffer. As a result, an in-block variance calculating section calculates variance and then outputs variance information. A buffer switch determination section selects either of the buffers depending on the prohibition information and the variance information, whereby a buffer switch is switched. The thus selected output is held in a reproduced image storage section.

REFERENCES:
patent: 4903138 (1990-02-01), Aragaki
patent: 5023919 (1991-06-01), Wataya
patent: 5327257 (1994-07-01), Hyrtzak et al.
patent: 5454051 (1995-09-01), Smith
patent: 5566002 (1996-10-01), Shikakura
patent: 5629778 (1997-05-01), Reuman
Geometric Processing Engineering by Computer Display (1), pp. 101-149, by Nikkan Kogyo Shinbunsha, Oct. 30, 1982.

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