Computer graphics processing and selective visual display system – Display driving control circuitry
Reexamination Certificate
2001-06-11
2004-06-01
Hjerpe, Richard (Department: 2673)
Computer graphics processing and selective visual display system
Display driving control circuitry
C345S213000, C345S546000
Reexamination Certificate
active
06744428
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for graphics and video generally and, more particularly, to a block move engine with macroblock addressing modes.
BACKGROUND OF THE INVENTION
Conventional video display approaches require data in raster scan order format (i.e., sequential scan lines). In conventional systems, both video and graphics images are usually stored in memory in raster scan order (i.e., complete scan lines of data are stored at sequential locations in memory). Raster scan order is convenient for normal data ordering required to drive a device, such as a display.
Referring to
FIG. 1
, a system
50
illustrates a BME incorporated within a combined graphics and video system. The system
50
comprises a video capture circuit
52
, a graphics CPU
54
, a BME
56
, a display driver circuit
58
, a memory
60
and a system bus
62
. The system bus
62
allows the various components of the system
50
to communicate. The video capture block
52
is able to write moving video or individual stills to the system memory
60
, while the graphics CPU
54
is responsible for drawing graphics objects from data stored within the system memory
60
. The VIDEO INPUT to the video capture block
52
can be a compressed data format. The compressed data is written as decompressed video to the memory
60
in sequential scan lines.
Modern communications (i.e., digital TV, Internet, etc.) often use data compression techniques in order to transfer more data (i.e., images) quickly over a given link. Data compression formats such as JPEG and MPEG use a basic image unit known as a macroblock, which,is typically a square block of 8×8 pixels. It is often convenient when decompressing such data compression formats to store the pixels for each macroblock grouped together in memory rather than storing the image as a whole in raster format. It is therefore conceivable that a system may contain video and data files which are stored in raster format and others in macroblock format.
It would be desirable to implement a BME to allow reading and writing of video or graphics images that are stored in either macroblock format or raster format.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an address signal in response to (i) a first ramp signal, (ii) a second ramp signal, and (iii) a format signal. The second circuit may be configured to generate the first and second ramp signals in response to one or more control signals. The address signal may support a raster format when the format signal is in a first state and may support a macroblock format when the format signal is in a second state.
The objects, features and advantages of the present invention include providing a method and/or architecture for implementing a block move engine that may (i) implement a number of macroblock addressing modes; (ii) store video data in various macroblock or raster formats that may be read and written in raster scan order; (iii) be suitable for both raster and macroblock format data and/or (iv) implement a base that is an address of (a) a top left pixel in a region being scanned for raster format data or (b) a first data point for a macroblock in a top left of a region being scanned for macroblock format data.
REFERENCES:
patent: 5874995 (1999-02-01), Naimpally et al.
patent: 5903310 (1999-05-01), Finotello et al.
patent: 6198477 (2001-03-01), Kurtze et al.
Pether David N.
Ratcliffe Martin J.
Fatahi Yar M.
Hjerpe Richard
LSI Logic Corporation
Maiorana P.C. Christopher P.
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