Block mask making method, block mask and exposure apparatus

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S030000

Reexamination Certificate

active

06821685

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention generally relates to block mask making methods, block masks and exposure apparatuses. More particularly, the present invention relates to a method of making a block mask used for pattern batch exposure, such a block mask, and an exposure apparatus using the same.
(2) Description of the Related Art
An exposure process for forming desired patterns on a wafer such as a semiconductor substrate is performed in the process of fabricating semiconductor integrated circuit (IC) devices.
Electron beam exposure for drawing patterns with an electron beam is known as an exposure method as described above. However, the electron beam exposure is so-called a single-stroke method in which patterns are painted out by a beam with its cross section shaped into a rectangle. Therefore, the electron beam exposure has a disadvantage in that the finer the pattern, the lower the throughput in wafer production.
For the purpose of eliminating the above disadvantage, a throughput-improved method has been developed in which a block mask having pattern-shaped openings are arranged in the position of the second aperture of an electron beam exposure apparatus, these patterns being drawn in batch fashion.
FIG. 20
is a diagram of steps of a conventional exposure procedure using the block mask. As is shown in this figure, IC data
10
for designing an IC is processed in step S
10
of producing exposure data. This step results in wafer exposure data
11
and block mask making data
12
. The block mask making data
12
is used to make a block mask
13
. The wafer exposure data
11
describes an exposure procedure with the block mask
13
.
Next, the block mask
13
is produced based on the block mask making data
12
. In the block mask
13
, approximately 100 blocks are formed each having a size of 5 &mgr;m×5 &mgr;m. Each block is subjected to exposure and is transferred on a wafer
14
in batch fashion.
In an exposure step S
11
following step S
10
, an electron beam from a beam source of the exposure apparatus is projected onto a given block of the block mask
13
designated by the wafer exposure data
11
. The beam passes through the given block and forms an image on a target area on the wafer
14
.
The above exposure process is repeated, so that patterns corresponding to a designed integrated circuit can be transferred on the wafer
14
.
FIG. 21
is a view of an outline of the conventional exposure apparatus. As is shown in this figure, the exposure apparatus is made up of an electronic gun
20
, a first aperture
21
, a deflector
22
, the block mask
13
, and another deflector
23
.
The electron beam emitted from the electronic gun
20
is shaped by the first aperture
21
, and is adjusted by the deflector
22
so as to be irradiated onto a given block of the block mask
13
. The electron beam passing through the block mask
13
is adjusted so as to form an image of the pattern on a given area on the wafer
14
, so that the pattern can be transferred thereon. The above process is repeated until all patterns are transferred on the wafer
14
.
The wafer exposure data
11
is used to control the deflectors
22
and
23
and a stage on which the wafer
14
is placed.
As described above, the exposure method with the block mask makes it possible to transfer each pattern of the block mask on the wafer in batch fashion. Thus, the block mask exposure method has a higher throughput than that of the so-called single stroke exposure method.
By the way, generally, IC data is formed by a plurality of layers (for example, a wiring layer, a gate layer, and a hole layer). Conventionally, as is shown in
FIG. 22
, a block mask is made for each layer, and exposure is performed on the layer basis. Similarly, a block mask is formed for each layer of each piece of IC data formed by identical or different basic figures.
An example in
FIG. 22
shows a case where IC data consist of IC data
30
for a wiring layer, IC data
31
for a gate layer, and IC data
32
for a hole layer. Blocks extracted from the respective IC data are arranged on the block mask, so that the respective mask block for each layer can be formed. For example, blocks
30
a
through
30
d
are extracted from the IC data
30
, and a block mask
33
including these blocks is made.
In exposure using the respective block mask for each layer, the block mask of the layer to be drawn is loaded to the exposure apparatus.
However, the above method needs the respective block mask for each layer, and is therefore expensive. Further, the method takes a long time to make the masks. Furthermore, the block mask is exchanged on the layer basis. This reduces throughput.
SUMMARY OF THE INVENTION
Taking into the above into consideration, an object of the present invention is to provide a block mask making method, a block mask and an exposure apparatus capable of reducing the cost without reducing throughput of the exposure apparatus.
The above object of the present invention is achieved by a method of making a block mask used for pattern batch exposure, comprising: an extraction step of extracting blocks from basic figures that belong to one or more layers of a semiconductor device and form an integrated circuit; and an arrangement determining step of determining an arrangement of the blocks extracted by the extraction step on a block mask.
The above object of the present invention is also achieved by a block mask used for pattern batch exposure, the block mask being made by: extracting blocks from basic figures forming an integrated circuit that belongs to one or more layers of a semiconductor device; and determining an arrangement of the extracted blocks on the block mask.
The above object of the present invention is also achieved by an exposure apparatus drawing a circuit pattern on a semiconductor substrate by exposure made by steps of: extracting blocks from basic figures forming an integrated circuit that belongs to one or more layers of a semiconductor device; and determining an arrangement of the extracted blocks on the block mask.
The above and other objects, features and advantages of the present invention will become more apparent from the following description when taken into conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.


REFERENCES:
patent: 5824437 (1998-10-01), Sakakibara et al.
patent: 5917579 (1999-06-01), Miyajima
patent: 6225025 (2001-05-01), Hoshino
Patent Abstract of Japan, publication No. 08-050874, publication date Feb. 20, 1996.

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