Block floating point mechanism for fast Fourier transform proces

Details Block floating point mechanism for fast Fourier transform proces Block floating point mechanism for fast Fourier transform proces

1994-10-21

1996-01-02

Envall, Jr., Roy N.

Boots, shoes, and leggings

726745, G06F 1714, G06F 1500, G06F 738

Patent

active

054814880

ABSTRACT:
A block floating point mechanism for a Fast Fourier Transform processor utilizes a pipelined butterfly processor to receive the source data to be computed, to perform the butterfly computations, and to output the resultant data. A shifter is coupled to the pipelined butterfly processor to receive the resultant data for shifting the resultant data by the largest overflow bit number occurring in the previous stage of butterfly computations. An overflow detector is coupled to the shifter to receive the shifted resultant data for detecting the largest overflow bit number occurring in this stage of butterfly computations, and for sending the detected largest overflow bit number to the shifter.

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patent: 4407018 (1983-09-01), Kanemasa
patent: 4825400 (1989-04-01), Simoncic et al.
patent: 5034910 (1991-07-01), Whelchel et al.
patent: 5303172 (1994-04-01), Magar et al.

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