Block erase for volatile memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185110, C365S222000, C365S190000, C365S205000, C365S207000, C365S208000

Reexamination Certificate

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07408813

ABSTRACT:
A system and method for erasing a block of data in a plurality of memory cells includes clamping one of a digit line and an I/O line in a sensing circuit of a memory device to a fixed logic level. The memory cells of the block of memory cells are selected and refreshed to the fixed logic level. A sense amplifier includes a clamping circuit adapted to connect one of a digit line and an I/O line to a fixed logic level in response to an erase signal during a refresh of the selected block of memory cells.

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