Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2008-06-05
2011-12-27
Lappas, Jason (Department: 2827)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230030, C365S185110
Reexamination Certificate
active
08085616
ABSTRACT:
A block decoder increases the integration level of a flash memory device by reducing the number of control signals. Address signals are substituted with existing high voltage switch signals. The block decoder of a flash memory device includes a primary decoding unit and a secondary decoding unit. The primary decoding unit outputs a decoding signal in response to first and second address coding signals of a high voltage and first to third control signals. The secondary decoding unit outputs a control signal to control the potential of a block word line in response to the decoding signal and first and second pre-decoded signals.
REFERENCES:
patent: 2006/0010363 (2006-01-01), Marelli et al.
patent: 1020020038862 (2002-05-01), None
patent: 1020020039950 (2002-05-01), None
Hynix / Semiconductor Inc.
Kilpatrick Townsend & Stockton LLP
Lappas Jason
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