Block de-interleaving system

Details Block de-interleaving system Block de-interleaving system

2011-03-01

2011-03-01

Sam, Phirin (Department: 2476)

Multiplex communications

Communication over free space

Combining or distributing information via code word channels...

C714S759000

Reexamination Certificate

active

07899022

ABSTRACT:
The block de-interleaving system includes an input for receiving a set of time-aligned blocks or interleaved data, physical memory unit, and a de-interleaving block for writing the blocks in the memory in a first predetermined manner and reading the blocks from the memory in a second predetermined manner to de-interleave the data of the blocks. The physical memory unit may include several different physical memories, and the de-interleaving block is adapted to completely write and read a block into and from one physical elementary memory.

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Imbesi et al., “Flexible Multi-Bank Architecture for Power-Constraint 3GPP-HSPDA Deinterleaving Applications”, published by Advanced System Technology, STMicroelectronics, Catania, Italy, p. 1-4.

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