Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2007-03-27
2007-03-27
Ho, Hoai V. (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C365S154000, C365S230050, C257S903000
Reexamination Certificate
active
11241390
ABSTRACT:
Bitcell layouts for use in electronic devices and systems are described. One embodiment relates to a memory including at least one bitcell, the bitcell including a storage cell region and a read channel region. The storage cell region is substantially L-shaped and includes six transistors. The read channel region is shaped to fit together with the substantially L-shaped storage cell region to form a substantially rectangular bitcell shape. Other embodiments are described and claimed.
REFERENCES:
patent: 5698873 (1997-12-01), Colwell et al.
patent: 6734573 (2004-05-01), Okada
patent: 2006/0067108 (2006-03-01), Islam
patent: 2006/0072356 (2006-04-01), Islam et al.
Annojvala Subodh
Briggs Lloyd
Hong Joseph
Islam Rabiul
Ho Hoai V.
Konrad Raynes & Victor LLP
Raynes Alan S.
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