Bit synchronization circuit

Telegraphy – Systems – Line-clearing and circuit maintenance

Patent

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328138, H04L 700

Patent

active

040040909

ABSTRACT:
A bit synchronization circuit which comprises a pulse generator for producing a pulse corresponding to a data signal received; a clock pulse oscillator for supplying a clock pulse having a frequency as high as four times the data speed of said data signal; a synchronization-controlling circuit supplied with signals from said pulse generator and clock pulse oscillator to produce a signal with a prescribed phase relative to a pulse delivered from said pulse generator; a ring counter whose reset terminal is supplied with an output signal from said synchronization-controlling circuit and whose count terminal is impressed with a clock pulse produced from said clock pulse oscillator; and a flip-flop circuit whose set terminal is supplied with the content "0" of said ring counter and whose reset terminal receives the content "2" thereof, thereby generating an output pulse synchronous with said data signal received.

REFERENCES:
patent: 3549804 (1970-12-01), Greenspan
patent: 3699261 (1972-10-01), Tomozawa
patent: 3836726 (1974-09-01), Wells
patent: 3851251 (1974-11-01), Wigner
patent: 3894185 (1975-07-01), Vieri
patent: 3941930 (1976-03-01), Mohri

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