Bit synchronization arrangement for a data modem or data receive

Details Bit synchronization arrangement for a data modem or data receive Bit synchronization arrangement for a data modem or data receive

1983-04-25

1985-09-03

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375119, 328 35, 328185, H04L 702

Patent

active

045396930

ABSTRACT:
In an asynchronous transmission mode, the bit synchronization arrangement receives data signals in the form of binary pulse trains (at A). It includes an oscillator (3) whose output signal (at C) has a frequency F.sub.OS approximately equal to twice the binary rate of the pulse trains and a transition detector (1, 22) which supplies a calibrated voltage pulse (at B.sub.2) at each data signal transition. The oscillator supplies a triangular internal signal (at D) at the frequency F.sub.OS and a phase correction circuit (2) is provided to reduce the algebraic value of the slope of this signal during each calibrated pulse so as to produce a predetermined constant advancing or delaying phase shift according as the calibrated pulse occurs during a negative or a positive ramp of this signal.

REFERENCES:
patent: 3743951 (1973-07-01), Carroll
patent: 3821470 (1974-06-01), Merrell
patent: 3893036 (1975-07-01), Cavoretto et al.
patent: 3909734 (1975-09-01), Palombo et al.

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