Computer graphics processing and selective visual display system – Computer graphics processing – Character generating
Reexamination Certificate
2001-09-10
2004-03-02
Luu, Matthew (Department: 2672)
Computer graphics processing and selective visual display system
Computer graphics processing
Character generating
C345S471000, C345S003300
Reexamination Certificate
active
06700577
ABSTRACT:
TECHNICAL FIELD
This invention relates to a device for converting bit strings comprising first control means, first storing means connected to the first control means and suitable for storing first strings of bits representative of source information to be converted, second storing means connected to the first control means and to the first storing means and suitable for storing second strings of bits representative of converted information. In particular, this invention relates to a device and relative method of converting information representing images from one resolution to another.
BACKGROUND ART
It is widely known that the peripheral units connected to an electronic processor such as for instance printers, facsimile machines, scanners, use resolutions that may differ from one peripheral to another or even on the same peripheral.
For example, it is known that a monofunctional peripheral, for instance an ink jet printer, can print with different resolutions, such as 150, 300, 600 dots per inch (or d.p.i.), where 1 inch corresponds in metric terms to about 25.4 mm, whereas a facsimile machine and a scanner may perform the scanning of a document with a resolution of 200 d.p.i. and transfer the information thus generated to the processor or to the printer itself according to resolution different from that of scanning.
It is also known that integrated peripherals are commercially available that are capable of performing various functions, for instance printer, scanner and facsimile functions.
Both the monofunctional and the integrated peripherals are capable, where necessary, of converting information from one resolution to another, but require an exceptionally high processing commitment and times of the central processing unit (CPU).
In fact, to perform conversion of the information from one resolution to another, the CPU of these peripherals uses predefined programs (software) intended for the manipulation of single data bits, an operation which, as will be obvious to those acquainted with the sector art, requires a large number of elementary instructions and accordingly high processing times.
For example, the simple implementation in a printer of an algorithm for conversion from a resolution of 150 d.p.i. to one of 300 d.p.i. requires that each single bit of source data be duplicated; in this operation, assuming a CPU with a normal instruction set, the CPU is required to load a string of the source information bits in an accumulator and, for each bit of this string, to store the same duplicated bit in a second accumulator.
As a result, assuming that for each bit the CPU has to execute at least three elementary instructions and that for each elementary instruction the CPU requires four clock pulses, the CPU will require a total of 16 clock pulses to duplicate each single bit.
In short, the conversion times for single bits of information, according to the known art, are long and necessarily depend both on the CPU, i.e. its instruction set, and on the clock rate.
The technical problem that this invention intends to solve is that of drastically reducing, by a factor of 100 or even more, the times needed by the monofunctional or integrated peripherals to perform the conversion of single data bits, for example in the conversions from one resolution to another, without having recourse, as happens in the known art, to the use of high speed CPUs or those with special instruction sets.
In particular, the invention intends to solve this problem by separating the data conversion functions from the characteristics of the CPU and its clock.
DISCLOSURE OF THE INVENTION
This technical problem is solved by the device for the conversion of bit strings characterized by second control means comprising a predefined number of binary configurations, each representing a conversion algorithm, connected to the first and second storing means and suitable for controlling through each binary configuration the conversion of each bit from the source information to the converted information.
According to a further characteristic of this invention, the data conversion times may be rendered independent from the clock of the CPU by implementing the device according to the invention and the associated method at a clock rate much greater than that of the CPU.
REFERENCES:
patent: 4771279 (1988-09-01), Hannah
patent: 0 574 901 (1993-12-01), None
patent: 05-02643 (1993-01-01), None
patent: 09-91415 (1997-04-01), None
Bianco Gianpiero
Cerutti Walter
Banner & Witcoff
Olivetti Tecnost S.p.A.
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