Bit-slice adder circuit

Details Bit-slice adder circuit Bit-slice adder circuit

1983-10-17

1986-08-05

Thomas, James D.

Boots, shoes, and leggings

G05F 750

Patent

active

046047239

ABSTRACT:
A bit-slice adder circuit for adding a plurality of input numbers in binary form. A tally circuit receives all of the bits from a bit position of all of the numbers and identifies the number of "ones" in that bit position. This information is coupled as address signals to a memory, which also receives, as address signals, carry signals. Each storage location at each address in the memory stores the sum of the carry portion of the location's address and the "ones" portion of the address signals from the tally circuit. The least significant bit of the addressed storage location is coupled to a shift register, and the remaining bits comprise the carry signals that are coupled to the memory's address input for the next signal from the tally circuit. After all of the bit positions in the input numbers have been coupled through the tally circuit, the sum is generated which comprises the last carry signal concatenated with the bits stored in the shift register.

REFERENCES:
patent: 3749899 (1973-07-01), Kohoutek
patent: 4021652 (1977-05-01), Munter
patent: 4106105 (1978-08-01), Pross, Jr.
patent: 4357674 (1982-11-01), Ikeda et al.

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