Data processing: artificial intelligence – Neural network – Structure
Reexamination Certificate
1997-10-23
2001-03-06
Davis, George B. (Department: 2122)
Data processing: artificial intelligence
Neural network
Structure
C706S041000, C706S027000
Reexamination Certificate
active
06199057
ABSTRACT:
TECHNICAL FIELD
This invention relates generally to processor architecture and more particularly to a bit-serial based recurrent neuroprocessor architecture
BACKGROUND ART
Recently, considerably progress has been achieved in the use of neural network methodologies for both diagnostic and control applications of nonlinear dynamical systems. This progress is due in part to the use of context sensitive neural network architectures (as in recurrent networks) and in part to improved training methodologies (as with multistream training techniques). The bulk of previous efforts used static or feedforward networks, which were plagued by slow adaptation and large error rates. Architecturally, recurrent neural networks are simple extensions of feedforward networks where the network's neuron node outputs are no longer a function of their current inputs, but also of the recent time history of inputs via time-lagged connections.
In the automotive sector to date, this recurrent neural network formalism has been successfully applied and reported in the literature for several engine subsystems. These include the idle speed problem and the antilock brake problem (control problems) and the misfire detection problem (a diagnostic problem). In either case, the recurrent neuromorphic methodologies developed were trained to detect, identify and/or control improper events in an operating internal combustion engine. In order to utilize information from sensors now in production use, the diagnostic and control operations are based upon the temporal analysis of existing sensor outputs or dynamics. It has been demonstrated that the diagnostic and control tasks can be accomplished by the use of trainable classifiers of suitable capacity. These trainable classifiers, however, are based upon systems which require considerable computational resources and as such require dedicated hardware implementations in order to meet the real-time on-board computations requirements. While there exist a number of commercially available neural hardware implementations, none meet the specific design requirements needed for large scale commercial deployment in the automotive sector.
SUMMARY OF THE INVENTION
In accordance with the present invention a cost-effective hardware realization of an application specific integrated circuit (ASIC) neuroprocessor is provided that will enable the execution of on-board diagnostic and control tasks in real-time in production vehicles. The neuroprocessor architecture and hardware is sufficiently flexible to be able to perform the misfire diagnostic task and still have the capability of performing other diagnostics or control functions in automotive systems (i.e., idle speed control, air/fuel ratio control, etc.). This flexibility is achieved through the combined use of bit-serial design techniques, parallel hardware architecture, high speed design, and time-multiplexing the hardware building blocks to achieve maximum computational performance for the required task.
More specifically, the neuroprocessor architecture comprises a neural module containing a pool of neurons, a global controller, a sigmoid activation Read Only Memory (ROM) look-up-table, a plurality of neuron state Random Access Memory (RAM) registers, and a synaptic weight RAM. The neuroprocessor achieves its compactness by employing a combination of bit-serial and serial-parallel techniques in the implementation of the neurons and mimimizing the number of neurons required to perform the task by time multiplexing techniques, where groups of neurons from a fixed pool of neurons are used to configure the successive hidden layers of the recurrent network topology. Sufficient neuron resources are provided to address the most challenging diagnostic and control applications. In fact, of the most demanding neural network vehicular applications, the misfire detection problem, a candidate pool of sixteen silicon neurons was deemed to be sufficient. By time multiplexing, the sixteen neurons can be re-utilized on successive layers. This time-multiplexing of layers radically streamlines the architecture by significantly increasing hardware utilization through reuse of available resources.
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Brooks & Kushman P.C.
California Institute of Technology
Davis George B.
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