Bit serial encoder

Details Bit serial encoder Bit serial encoder

1980-12-11

1983-10-18

Atkinson, Charles E.

Excavating

371 37, G06F 1110

Patent

active

044109890

ABSTRACT:
An encoder for Reed Solomon codes employs structure for producing interleaved code wherein redundancy bits are realized by a bit serial multiplicative procedure. Operations are accomplished with respect to the dual basis to the conventional polynomial representational basis as coefficients of successive powers of an element of a finite field. Code bits are generated and interleaved by a feedback shift register constructed from standard RAM chips. The structure is simplified by selection of a generator polynomial from a class which exhibits symmetry whereby the number of independent coefficients for representing the generator polynomial is halved.

REFERENCES:
patent: 3278729 (1966-10-01), Chien
patent: 3487361 (1969-12-01), Frey, Jr.
patent: 3988677 (1976-10-01), Fletcher et al.
Mandelbaum, Some Classes of Multiple-Burst Error-Correcting Codes Using Threshold Decoding, IEEE Trans. on Info. Theory, Mar. 1972, pp. 285-291.
Peterson & Weldon, Error Correcting Codes, 2nd Edition, The MIT Press, 1972, pp. 42-47.
Massey, "Reversible Codes", Information and Control, vol. 7, pp. 369-370 (1964).

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