Bit-serial division method and apparatus

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364761, G06F 700

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active

049949950

ABSTRACT:
A bit-serial division method for computing the value v/u, where v and u are each n-bit vectors that are elements in a finite Galois field GF(2.sup.n) consisting of 2.sup.n elements. The n-bit components of each element in the field are coordinates of the element in a canonical basis of the field. Vector u is converted from canonical basis to a dual basis. Vector u in dual basis also comprises n bits in the finite field ordered according to an index i that takes on values from 0 to (n-1). All bits n of the converted vector u are loaded into a shift register in parallel, then converted from dual basis back to canonical basis to produce a single bit output w.sub.0 from a lookup table which generates bitwise the inverse of the n-bit vector u. The bits in the shift register are shifted (n-1) times to generate successive additional single bit outputs w.sub.i with said lookup table. Then each bit w.sub.i is multiplied by the vector v and a corresponding element c.sub.i in dual basis to generate a cumulative sum of these products that provides, upon completion of the (n-1) shifts, the bit-serial division result v/u.

REFERENCES:
patent: 4567568 (1986-01-01), Inagawa et al.
patent: 4574361 (1986-03-01), Inagawa et al.
Whiting, "Bit-Serial Reed-Solomon Decoders in VLSI", PhD Thesis, submitted to California Institute of Technology on Aug. 22, 1984.
Howard M. Shao et al., "On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays", IEEE Transactions on Computers, vol. 37, No. 10, Oct. 1988.
Elwyn R. Berlekamp, Fellow, IEEE, "Bit-Serial Reed-Solomon Encoders", IEEE Transactions On Information Theory, vol. IT-28, No. 6, Nov. 1982.
In-Shek Hsu et al., "The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm" IEEE Transactions On Computers, vol. C-33, No. 10, Oct. 1984.
Charles C. Wang, et al., "VLSI Architectures for Computing Multiplications and Inverses in GF(2m)", IEEE Transactions on Computers, vol. C-34, No. 8, Aug. 1985.

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