Bit-serial digital expandor

Coded data generation or conversion – Digital code to digital code converters – To or from particular bit symbol

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333 14, H03M 750

Patent

active

057933154

ABSTRACT:
A bit-serial digital expandor includes a bit-serial dual scaler block (340), a bit-serial rectifier block (320), a bit-serial lowpass wave digital filter block (350), a bit-serial scaler with overflow detection block (360), a bit-serial multiplier block (380), and a bit-serial scaler and clipper block (395). This bit-serial expandor can be used in an AMPS cellular telephone receiver to produce a receiver having a lower silicon area, gate count, and current drain compared to equivalent parallel architecture receivers.

REFERENCES:
patent: 4087754 (1978-05-01), Song
patent: 4600902 (1986-07-01), Lafferty
patent: 4799242 (1989-01-01), Vermeulen
patent: 4891837 (1990-01-01), Walker et al.
patent: 5274578 (1993-12-01), Noeth et al.
"An Integrated Expandor Circuit", by Pietro G. Erratico and Raimondo Caprio, IEEE Journal of Solid-State Circuits, vol. SC-11, No. 6, Dec. 1976, pp. 762-763.
"Compact NMOS Building Blocks and a Methodology for Dedicated Digital Filter Applications," by Johan K.J. Van Ginderdeuren, Hugo J. De Man, Nelson F. Goncalves, and Wilhelmus A.M. Van Noije, IEEE Journal of Solid-State Circuits, vol. SC-18, No. 3, Jun. 1983, pp. 306-316.

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