Bit segment timing organization providing flexible bit...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S048000, C345S084000, C345S085000, C345S108000

Reexamination Certificate

active

07471273

ABSTRACT:
Disclosed are reset techniques for a spatial light modulator, and related system for displaying an image. The systems and methods have pixels that are loaded with data and reset commands to take on binary states, where the methods employ adaptable algorithms to provide flexibility in placement of the reset commands. Specifically, valid regions for such reset commands are determined, and times for consecutive bit segments are calculated; and DMD load times are adjusted for a proper sequence. An advantage of the disclosed methods is that two consecutive bit segments are no longer restricted to following a pattern of normal/short bit segments. In contrast, with the disclosed technique short segments may be consecutive, allowing the implementation of additional enhancements, including neutral density filtering (NDF) techniques that typically include adjacent short bits in the bit sequence.

REFERENCES:
patent: 5764208 (1998-06-01), Burton et al.
patent: 6008785 (1999-12-01), Hewlett et al.
patent: 6573951 (2003-06-01), Hewlett et al.

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