Bit mask generator circuit using multiple logic units for genera

Details Bit mask generator circuit using multiple logic units for genera Bit mask generator circuit using multiple logic units for genera

1989-07-31

1992-07-07

Lee, Thomas C.

Boots, shoes, and leggings

395DIG1, 395775, 3642597, 3649474, 364DIG1, G06F 900

Patent

active

051290669

ABSTRACT:
A mask generation circuit for generating a bit mask sequence of 2.sup.N bits including a first logic circuit having a single level of combinational logic for receiving an N bit indication of the bit mask sequence and for providing an output of 2.sup.q plus 2.sup.P signals to a second logic circuit that includes 2.sup.P identical logical units of not more than 2 levels of combinational logic each connected in parallel and each unit including 2.sup.q -1 repeating circuit sets. These units are connected to receive the signals from the first logic circuit and provide therefrom the ibt mask sequence. In one embodiment of the present invention, a bit mask generator is provided that includes a first edge generator circuit and a second edge generator circuit where each of the edge generator circuits are provided N bit indications indicating the binary digital sequence transition point. The output of the edge generator are provided to a combinational logic circuit that combines these two edge bit mask sequences to provide the mask sequence.

REFERENCES:
patent: 4087811 (1976-02-01), Weinberger
patent: 4569016 (1986-02-01), Hao et al.
Barrett et al., "Four-Bit Look-Ahead Mask Generator", IBM Technical Disclosure Bulletin, vol. 26, No. 1 (Jun. 1983), pp. 197-198.
C. B. Steiglitz. "Mask Generator", IBM Technical Bulletin, vol. 23, No. 1 (Jun. 1980), pp. 149-150.

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