Bit mask generator

Details Bit mask generator Bit mask generator

1989-01-26

1991-05-21

Atkinson, Charles E.

Excavating

G06F 1110

Patent

active

050181475

ABSTRACT:
A bit mask generator comprises partial mask generators for generating partial mask data corresponding to a plurality of blocks obtained by dividing input data, and parity correction circuits for correcting the partial mask data in accordance with a parity input and generating parity outputs. Each of the partial mask generators includes a plurality of first exclusive OR gates each of which receives bit data of a corresponding block as one input and input data of an LSB (Least Significant Bit) or an output of a lower-bit first exclusive OR gate as the other input. Each of the parity correction circuits includes a plurality of second exclusive OR gates each of which receives as one input the partial mask data generated by the partial mask generator of a corresponding block and as the other input a parity generated by a lower-bit parity correction circuit. An output from each second exclusive OR gate is generated as mask data of the corresponding block, and an output from the MSB (Most Significant Bit) second exclusive OR gate is generated as the parity.

REFERENCES:
patent: 4556978 (1985-12-01), Kregness et al.
patent: 4903219 (1990-02-01), Reynolds et al.

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