Bit map display apparatus for performing an interruption display

Details Bit map display apparatus for performing an interruption display Bit map display apparatus for performing an interruption display

1988-08-30

1990-07-10

Brier, Jeffery A.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340734, G09G 514

Patent

active

049409719

ABSTRACT:
A bit map display apparatus of this invention includes a bit map memory consisting of a plurality of memory planes, a display controller which can output a window number indicating a displaying window in accordance with display scan, a register, arranged for each plane, for holding bit data for designating a display enable/disable state in units of windows, a selector, arranged for each plane, for selecting one bit of output data from the corresponding register as a mask bit in accordance with the window number indicated by the display controller, and a gate circuit, arranged for each plane, for controlling data read out from the corresponding plane in accordance with the mask bit.

REFERENCES:
patent: 4509043 (1985-04-01), Mossaides
patent: 4742474 (1988-05-01), Knierim
patent: 4766431 (1988-08-01), Kobayashi et al.
patent: 4823119 (1989-04-01), Ishii
patent: 4857905 (1989-08-01), Ogawa
Kouki Hasebe, AM95C60 (QP-DM) Technical Manual, AM95C60 and AM8171, pp. 115-116.

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