Bit map data generation apparatus

Details Bit map data generation apparatus Bit map data generation apparatus

1992-11-12

1995-10-10

Bayerl, Raymond J.

395108, 395102, G06K 1500, H04N 140

Patent

active

054577748

ABSTRACT:
Data at a current address and data preceding and succeeding the current address data are read out by bit data conversion means 11 for converting data received from contour data storing means 1 into bit map data. Left-side data reading means 21 reads data at the digit preceding the current address by one dot from the bit map data (or from print data which has been processed immediately before). Current data reading means 22 reads data at the digit of the current address. Right-side by one-dot data reading means 23 reads data at the digit succeeding the current address by one dot. Right-side by two-dot data reading means 24 reads data at the digit succeeding the current address by two dots. Using logical product operation means 27 and 28, logical product operations are performed between each pair of the data from the reading means 21 to 24 with one of each pair being inverted by data inversion means 25 and 26. The same process is performed for these operation results by data inversion means 30, and logical product operation means 31 and 32. The operation result is output to logical sum operation means 33 as print data. Thus, when there exists a series of an even number of dots continued in the row direction up to a contour point, two dots before the contour point are converted into blank dots (null dot data). The foregoing is especially advantageous in high-speed printing operations.

REFERENCES:
patent: 4953027 (1990-08-01), Tong et al.
patent: 5091973 (1992-02-01), Watanabe
patent: 5097327 (1992-03-01), Hasebe
patent: 5270728 (1993-12-01), Lund et al.

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